/**
******************************************************************************
* @file    x_nucleo_cca01m1.h
* @author  Central Labs
* @version V1.0.0
* @date    6-October-2015
* @brief   This file contains definitions for x_nucleo_cca01m1.c
*          firmware driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*   1. Redistributions of source code must retain the above copyright notice,
*      this list of conditions and the following disclaimer.
*   2. Redistributions in binary form must reproduce the above copyright notice,
*      this list of conditions and the following disclaimer in the documentation
*      and/or other materials provided with the distribution.
*   3. Neither the name of STMicroelectronics nor the names of its contributors
*      may be used to endorse or promote products derived from this software
*      without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/


/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __X_NUCLEO_CCA01M1_H
#define __X_NUCLEO_CCA01M1_H

#ifdef __cplusplus
extern "C" {
#endif
  
  /* Includes ------------------------------------------------------------------*/
#ifdef USE_STM32F4XX_NUCLEO
#include "stm32f4xx_hal.h"
#endif

#ifdef USE_STM32L0XX_NUCLEO
#include "stm32l0xx_hal.h"
#endif

#ifdef USE_STM32F0XX_NUCLEO
#include "stm32f0xx_hal.h"
#endif
  
  /** @addtogroup BSP
  * @{
  */
  
  /** @addtogroup X_NUCLEO_CCA01M1
  * @{
  */ 
  
  /** @defgroup X_NUCLEO_CCA01M1_LOW_LEVEL 
  * @{
  */  
  
  /** @defgroup X_NUCLEO_CCA01M1_LOW_LEVEL_Exported_Defines 
  * @{
  */
  
  /* I2C clock speed configuration (in Hz) */
#if (defined (USE_STM32F4XX_NUCLEO))
#define NUCLEO_I2C_EXPBD_SPEED                         400000
#endif /* USE_STM32F4XX_NUCLEO */
  
  /* Timing samples for L0 with SYSCLK 32MHz set in SystemClock_Config() */
#if (defined (USE_STM32L0XX_NUCLEO))
#define NUCLEO_I2C_EXPBD_TIMING_100KHZ       0x10A13E56 /* Analog Filter ON, Rise Time 400ns, Fall Time 100ns */
#define NUCLEO_I2C_EXPBD_TIMING_400KHZ       0x00B1112E /* Analog Filter ON, Rise Time 250ns, Fall Time 100ns */
#endif /* USE_STM32L0XX_NUCLEO */
  
#if (defined (USE_STM32L1XX_NUCLEO))
#define NUCLEO_I2C_EXPBD_SPEED                         100000
#endif /* USE_STM32L1XX_NUCLEO */
  
  /* I2C peripheral configuration defines */
#define NUCLEO_I2C_EXPBD                            I2C1
#define NUCLEO_I2C_EXPBD_CLK_ENABLE()               __I2C1_CLK_ENABLE()
#define NUCLEO_I2C_EXPBD_SCL_SDA_GPIO_CLK_ENABLE()  __GPIOB_CLK_ENABLE()
  
#if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)) || (defined (USE_STM32L0XX_NUCLEO)))
#define NUCLEO_I2C_EXPBD_SCL_SDA_AF                 GPIO_AF4_I2C1
#endif
  
#if ((defined (USE_STM32F0XX_NUCLEO)))
#define NUCLEO_I2C_EXPBD_SCL_SDA_AF                 GPIO_AF1_I2C1
#endif
  
#define NUCLEO_I2C_EXPBD_SCL_SDA_GPIO_PORT          GPIOB
#define NUCLEO_I2C_EXPBD_SCL_PIN                    GPIO_PIN_6
#define NUCLEO_I2C_EXPBD_SDA_PIN                    GPIO_PIN_7
  
#define NUCLEO_I2C_EXPBD_FORCE_RESET()              __I2C1_FORCE_RESET()
#define NUCLEO_I2C_EXPBD_RELEASE_RESET()            __I2C1_RELEASE_RESET()
  
  /* I2C interrupt requests */
#if ((defined (USE_STM32F4XX_NUCLEO)) || (defined (USE_STM32L1XX_NUCLEO)))
#define NUCLEO_I2C_EXPBD_EV_IRQn                    I2C1_EV_IRQn
#define NUCLEO_I2C_EXPBD_ER_IRQn                    I2C1_ER_IRQn
#endif
  
#if (defined (USE_STM32L0XX_NUCLEO) || (defined (USE_STM32F0XX_NUCLEO)))
#define NUCLEO_I2C_EXPBD_EV_IRQn                    I2C1_IRQn
#endif
  
  /* Maximum Timeout values for flags waiting loops. These timeouts are not based
  on accurate values, they just guarantee that the application will not remain
  stuck if the SPI communication is corrupted.
  You may modify these timeout values depending on CPU frequency and application
  conditions (interrupts routines ...). */
#define NUCLEO_I2C_EXPBD_TIMEOUT_MAX    0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
  /**
  * @}
  */   
  
  
  #if ((defined (USE_STM32F0XX_NUCLEO)))
#define BUTTON_KEY                      BUTTON_USER
  #define KEY_BUTTON_PIN                USER_BUTTON_PIN
#define  GPIO_SPEED_FAST GPIO_SPEED_HIGH
  
#endif
  
  /** @defgroup X_NUCLEO_CCA01M1_LOW_LEVEL_Exported_Functions 
  * @{
  */
  
  uint8_t STA350BW_I2C_Init(void);
  uint8_t STA350BW_I2C_ReadMulti(uint8_t* pBuffer, uint8_t addr, uint8_t reg, uint16_t length);
  uint8_t STA350BW_I2C_WriteMulti(uint8_t* pBuffer, uint8_t addr, uint8_t reg, uint16_t length);
  uint8_t STA350BW_I2C_Read(uint8_t addr, uint8_t reg, uint8_t * value);
  uint8_t STA350BW_I2C_Write(uint8_t addr, uint8_t reg, uint8_t value);
  uint8_t STA350BW_I2C_Delay(uint32_t delay_ms);
  /**
  * @}
  */
  
  /**
  * @}
  */
  
  /**
  * @}
  */
  
  /**
  * @}
  */
  
  /**
  * @}
  */
  
#ifdef __cplusplus
}
#endif

#endif /* __X_NUCLEO_CCA01M1_H */



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 
